We independently develop a full series of quantum security chip products, building a tamper-proof hardware-level root of trust that fortifies the quantum security defense line for all scenarios from the chip level up.
End-to-end custom secure ASIC development capabilities covering the entire process of architecture definition, RTL design, verification & testing, and industrialized mass production.
Native integration of hardware root of trust, secure boot, PQC crypto accelerator, and tamper-resistant IP, with chip architecture and functions customizable to customer requirements.
Supports 28nm/14nm/7nm process nodes, providing custom chip design services for automotive-grade, military, medical, satellite-borne, and other grade requirements.
Compared with general-purpose chips, custom ASICs offer higher performance, lower power consumption, better security, and lower cost, meeting customized high-security needs in special scenarios.
Our QLab series secure elements are certified to Common Criteria CC EAL5+ and China's national cryptographic Level 2 certification, delivering ultra-compact, low-power tamper-resistant security modules.
Advanced physical tamper-resistance and side-channel attack protection technologies deliver chip-level high security, while optimized power consumption and package size suit lightweight scenarios.
Package size as small as 2mm × 2mm, operating current ≤1 μA, full cryptographic algorithm support, and hardware-isolated key storage.
Widely applicable to smart meters, IoT terminals, drones, medical devices, identity authentication tokens, and other lightweight, high-security scenarios.
Hardware-level trusted modules certified to FIPS 140-3 and TCG TPM 2.0, providing high-grade trusted computing capabilities for servers, industrial computers, and defense equipment.
Deep integration of PQC algorithms with the TPM standard, supporting top-security-level PQC and Chinese national cryptographic (SM) algorithms, with tamper resistance and side-channel attack protection features.
Supports ML-DSA-87, ML-KEM-1024, SM2, SM3, SM4 and other algorithms, with hardware-isolated key storage and secure boot time ≤200 ms.
China's first FIPS 140-3 certified quantum-resistant TPM module, seamlessly compatible with the existing TPM ecosystem, helping customers complete quantum-security upgrades at low cost.
Our self-developed QuantonLab QS001 series quantum-resistant security chips are based on the RISC-V architecture, with hardware-native integration of NIST-standardized PQC algorithms and Chinese national cryptographic (SM) algorithms.
Hardware-native integration of PQC and SM algorithms paired with a dedicated crypto acceleration engine greatly improves algorithm execution efficiency, while multiple physical protection mechanisms ensure chip hardware security.
CPU frequency up to 1 GHz, integrated 1 MB SRAM and 4 MB Flash, supports ML-KEM-768, ML-DSA-87, SM2, SM3, SM4 and other algorithms, with encryption performance improved by more than 30x.
China's first secure MCU supporting both SM (national cryptographic) and PQC dual algorithms, widely applicable to satellite platforms, industrial edge, in-vehicle gateways, defense equipment, and more.
